`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: CBICR, Tsinghua Univ.
// Engineer: Hongyi Li
// 
// Create Date: 2025/01/06 15:48:30
// Design Name: 
// Module Name: Bypass MUX for SMART NoC
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////

module BypassMux
#(
    parameter DataWidth = 'd32,
    parameter VCNumber  = 'd4
)(
    input                                       clk, rst_n,

    input                                       i_bypass_is_head,
    input                                       i_bypass_enabled,

    input  [DataWidth                    -1:0]  i_bypass_data,
    input  [DataWidth                    -1:0]  i_bw_data,
    input  [DataWidth                    -1:0]  i_bw_head,

    output [DataWidth                    -1:0]  s1_data,
    output [DataWidth                    -1:0]  s1_head,
    output                                      s1_bypass,
    output [5                            -1:0]  s1_req
);

reg  [           4:0]  req;
reg  [DataWidth -1:0]  bypass_head;

assign s1_data = i_bypass_enabled ? i_bypass_data : i_bw_data;
assign s1_head = i_bypass_enabled ? (i_bypass_is_head ? i_bypass_data : bypass_head) : i_bw_head;
assign s1_req = req;
assign s1_bypass = i_bypass_enabled;

always @(posedge clk) begin
    if (~rst_n)
        bypass_head <= 0;
    else if (i_bypass_enabled & i_bypass_is_head)
        bypass_head <= i_bypass_data;
    else
        bypass_head <= bypass_head;
end

always @(*) begin
    if ((s1_head[3:0] != 4'b0) || (s1_head[VCNumber+19:20] == 0))
        req = 5'b00000;

    else if (|s1_head[12: 8])    // X_Hops - Number
        if (s1_head[13])         //        - Sign
            req = 5'b00001;       // - E
        else
            req = 5'b00010;       // - W

    else if (|s1_head[18:14])    // Y_Hops - Number
        if (s1_head[19])         //        - Sign
            req = 5'b00100;       // - N
        else
            req = 5'b01000;       // - S
    else
        req = 5'b10000;           // - L
end



endmodule